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UltraSPARC T2

UltraSPARC T2
Ultrasparc t2 micrograph.JPG
UltraSPARC T2 micrograph
Produced 2007
Designed by Sun Microsystems
Common manufacturer(s)
Max. CPU clock rate 1.2 GHz to 1.6 GHz
Instruction set SPARC V9
Cores 4, 6, 8
Predecessor UltraSPARC T1
Successor SPARC T3
Core name(s)
  • S2

Sun Microsystems' UltraSPARC T2 microprocessor is a multithreading, multi-core CPU. It is a member of the SPARC family, and the successor to the UltraSPARC T1. The chip is sometimes referred to by its codename, Niagara 2. Sun started selling servers with the T2 processor in October 2007.

The T2 is a commodity derivative of the UltraSPARC series of microprocessors, targeting Internet workloads in computers, storage and networking devices. The processor, manufactured in 65 nm, is available with eight CPU cores, and each core is able to handle eight threads concurrently. Thus the processor is capable of processing up to 64 concurrent threads. Other new features include:

There are 8 stages for integer operations, instead of 6 in the T1.

The T2 processor can be found in the following products from Sun and Fujitsu Computer Systems:

Sun also licensed the T2 processor to Themis Computer, which introduced the first non-Sun T2-based servers in 2008:

In April 2008, Sun released servers based on the UltraSPARC T2 Plus processor, an SMP capable version of UltraSPARC T2.

Sun released the UltraSPARC T2 Plus processor with the following changes:

UltraSPARC T2 Plus processors can be found in the following products from Sun and Fujitsu Computer Systems: Two-way SMP servers:

Four-way SMP server:

The High Performance Computing Virtual Laboratory in Canada built a compute cluster using 78 Sun SPARC Enterprise T5140 servers. With two 1.2 GHz T2 Plus chips in each T5140 server, the cluster has close to 10,000 compute threads, making it ideal for high-throughput workloads.

Like the T1, the T2 supports the Hyper-Privileged execution mode. The SPARC Hypervisor runs in this mode and can partition a T2 system into 64 Logical Domains, and a two-way SMP T2 Plus system into 128 Logical Domains, each of which can run an independent operating system instance.


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