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SPARC

SPARC
Sparc-logo.svg
Designer Sun Microsystems (acquired by Oracle Corporation)
Bits 64-bit (32 → 64)
Introduced 1987 (shipments)
Version V9 (1993) / OSA2015
Design RISC
Type Register-Register
Encoding Fixed
Branching Condition code
Endianness Bi (Big → Bi)
Page size 8 KB (4 KB → 8 KB)
Extensions VIS 1.0, 2.0, 3.0, 4.0
Open Yes, and royalty free
Registers
General purpose 31 (G0 = 0; non-global registers use register windows)
Floating point 32 (usable as 32 single-precision, 32 double-precision, or 16 quad-precision)

The Scalable Processor Architecture (SPARC) is a reduced instruction set computing (RISC) instruction set architecture (ISA) originally developed by Sun Microsystems. Since the establishment of SPARC International, Inc. in 1989, the SPARC architecture has been developed by its members. SPARC International is also responsible for licensing and promoting the SPARC architecture, managing SPARC trademarks (including SPARC, which it owns), and providing conformance testing. SPARC International was intended to open the SPARC architecture to create a larger ecosystem; and SPARC has been licensed to several manufacturers, including Atmel, Cypress Semiconductor, Fujitsu, and Texas Instruments. As a result of SPARC International, SPARC is fully open, non-proprietary and royalty-free.

The first implementation of the original 32-bit SPARC architecture (SPARC V7) were initially designed and used in Sun's Sun-4 workstation and server systems, replacing their earlier Sun-3 systems based on the Motorola 68000 series of processors. Later, SPARC processors were used in SMP and CC-NUMA servers produced by Sun, Solbourne and Fujitsu, among others, and designed for 64-bit operation.

As of July 2016, the latest commercial high-end SPARC processors are Fujitsu's SPARC64 X+ (introduced in 2014 for its SPARC M10 server) and SPARC64 XIfx (introduced in 2015 for its PRIMEHPC FX100 supercomputer); and Oracle's SPARC M7 (introduced in October 2015 for its high-end servers).


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