Threshold Voltage

The threshold voltage, commonly abbreviated as V_th or V_{GS (th)}, of a field-effect transistor (FET) is the minimum gate-to-source voltage differential that is needed to create a conducting path between the source and drain terminals.

When referring to a junction field-effect transistor (JFET), the threshold voltage is often called "pinch-off voltage" instead. This is somewhat confusing since "pinch off" applied to insulated-gate field-effect transistor (IGFET) refers to the channel pinching that leads to current saturation behaviour under high source–drain bias, even though the current is never off. Unlike "pinch off", the term "threshold voltage" is unambiguous and refers to the same concept in any field-effect transistor.

In n-channel enhancement-mode devices, a conductive channel does not exist naturally within the transistor, and a positive gate-to-source voltage is necessary to create one. The positive voltage attracts free-floating electrons within the body towards the gate, forming a conductive channel. But first, enough electrons must be attracted near the gate to counter the dopant ions added to the body of the FET; this forms a region with no mobile carriers called a depletion region, and the voltage at which this occurs is the threshold voltage of the FET. Further gate-to-source voltage increase will attract even more electrons towards the gate which are able to create a conductive channel from source to drain; this process is called inversion.

In contrast, n-channel depletion-mode devices have a conductive channel naturally existing within the transistor. Accordingly, the term 'threshold voltage' does not readily apply to turn such devices 'on', but is used instead to denote the voltage level at which the channel is wide enough to allow electrons to flow easily. This ease-of-flow threshold also applies to p-channel depletion-mode devices, in which a positive voltage from gate to body/source creates a depletion layer by forcing the positively charged holes away from the gate-insulator/semiconductor interface, leaving exposed a carrier-free region of immobile, negatively charged acceptor ions.

In wide planar transistors the threshold voltage is essentially independent of the drain–source voltage and is therefore a well defined characteristic, however it is less clear in modern nanometer-sized MOSFETs due to drain-induced barrier lowering.

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