Athlon 64 X2
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| Produced | From 2005 |
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| Marketed by | AMD |
| Designed by | AMD |
| Common manufacturer(s) |
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| Max. CPU clock rate | 1.9 GHz to 3.2 GHz |
| HyperTransport speeds | 1 GHz to 1.8 GHz |
| Min. feature size | 90 nm to 65 nm |
| Instruction set | MMX, SSE, SSE2, SSE3, x86-64, 3DNow! |
| Microarchitecture | ("Kuma" based models are K10 derived) |
| Cores | 2 |
| Socket(s) |
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The Athlon 64 X2 is the first dual-core desktop CPU designed by AMD. It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with another functional core on one die, and connecting both via a shared dual-channel memory controller/north bridge and additional control logic. The initial versions are based on the E-stepping model of the Athlon 64 and, depending on the model, have either 512 or 1024 KB of L2 Cache per core. The Athlon 64 X2 is capable of decoding SSE3 instructions (except those few specific to Intel's architecture).
In June 2007, AMD released low-voltage variants of their low-end 65 nm Athlon 64 X2, named "Athlon X2". The Athlon X2 processors feature reduced TDP of 45 W. The name was also used for K10 based budget CPUs with two cores deactivated.
The primary benefit of dual-core processors (like the Athlon 64 X2) over single-core processors is their ability to process more software threads at the same time. The ability of processors to execute multiple threads simultaneously is called thread-level parallelism (TLP). By placing two cores on the same die, the X2 effectively doubles the TLP over a single-core Athlon 64 of the same speed. The need for TLP processing capability is dependent on the situation to a great degree, and certain situations benefit from it far more than others. Certain programs are currently written for only one thread, and are therefore unable to utilize the processing power of the second core.
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