3D XPoint

3D XPoint (pronounced three dee cross point) is a non-volatile memory (NVM) technology announced by Intel and Micron in July 2015. Intel refers to storage devices using the technology under the name Optane while Micron uses the name QuantX. It is generally believed that it would be a phase-change memory-based technology, but other possibilities have been suggested.

Details of the materials and physics of operation were not disclosed. Bit storage is based on a change of bulk resistance, in conjunction with a stackable cross-gridded data access array.

Micron has claimed the technology will be about half the price of DRAM, but four to five times the price of NAND flash. Intel claims 3D Xpoint has up to 1,000 times the speed and endurance of NAND.

Development of 3D XPoint began around 2012. Intel and Micron had developed other non-volatile phase-change memory (PCM) technologies previously;Mark Durcan of Micron said 3D XPoint architecture differs from previous offerings of PCM, and uses chalcogenide materials for both selector and storage parts of memory cell that are faster and more stable than traditional PCM materials like GST.

As of 2015 full details of the technology had not been given by Intel or Micron, though the technology is apparently not based on electrons. 3D XPoint has been stated to use electrical resistance and to be bit addressable. Similarities to the resistive random-access memory under development by Crossbar Inc. have been noted, but 3D XPoint storage physics is different. 3D XPoint developers indicate that it is based on changes in resistance of the bulk material. Intel CEO Brian Krzanich responded to ongoing questions on the XPoint material that the switching was based on "bulk material properties". Intel has stated that 3D XPoint does not use a phase-change or memristor technology.

No other supplier appears to have a working Resistive RAM/Phase-Change Memory technology that is sampling and matches 3D XPoint's performance and endurance.

Individual data cells do not need a transistor, so packing density will be four times that of DRAM.

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