The Z8000 registers | ||||||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | (bit position) | ||
Grouping | ||||||||||||||||||
Main registers | 16-bit | 32-bit | 64-bit | |||||||||||||||
RH0 | RL0 | R0 | RR0 | RQ0 | ||||||||||||||
RH1 | RL1 | R1 | ||||||||||||||||
RH2 | RL2 | R2 | RR2 | |||||||||||||||
RH3 | RL3 | R3 | ||||||||||||||||
RH4 | RL4 | R4 | RR4 | RQ4 | ||||||||||||||
RH5 | RL5 | R5 | ||||||||||||||||
RH6 | RL6 | R6 | RR6 | |||||||||||||||
RH7 | RL7 | R7 | ||||||||||||||||
R8 | RR8 | RQ8 | ||||||||||||||||
R9 | ||||||||||||||||||
R10 | RR10 | |||||||||||||||||
R11 | ||||||||||||||||||
R12 | RR12 | RQ12 | ||||||||||||||||
R13 | ||||||||||||||||||
R14 | RR14 | |||||||||||||||||
R15 | ||||||||||||||||||
Status register | ||||||||||||||||||
S | SN | E | V | M | - | - | - | C | Z | S | PO | D | I | H | - | Flags | ||
Program counter | ||||||||||||||||||
0 | Segment | 0 0 0 0 0 0 0 0 | Program Counter | |||||||||||||||
Address |
The Z8000 ("zee-eight-thousand") is a 16-bit microprocessor introduced by Zilog in 1979. The architecture was designed by Bernard Peuto while the logic and physical implementation was done by Masatoshi Shima, assisted by a small group of people. The Z8000 was not Z80-compatible, and although it saw steady use well into the 1990s, it was not very widely used. However, the Z16C01 and Z16C02 Serial Communication Controllers still use the Z8000 core.
Although fundamentally a 16-bit architecture, some versions (such as the Z8001) had 7-bit segment registers that extended the address space to 8 megabytes.
The register set consisted of sixteen 16-bit general purpose registers, labeled R0 through R15. These can be concatenated into eight 32-bit registers, labeled RR0/RR2/../RR14, or into four 64-bit registers, labeled RQ0/RQ4/RQ8/RQ12. The first eight registers can be subdivided into sixteen 8-bit registers, labeled RL0 though RL7 for the lower byte and RH0 through RH7 for the upper byte. Register R15 is designated as stack pointer. On the Z8001, register R14 is used for selecting the stack segment.
There was both a user mode and a supervisor mode, selected by bit 14 in the flag register. In supervisor mode, the stack registers point to the system stack and all privileged instructions are available. In user mode, the stack registers point to the normal stack and all privileged instructions will generate a fault.
Like the Zilog Z80, the Z8000 included built-in DRAM refresh circuitry. Although an attractive feature for designers of the time, overall the Z8000 was not especially fast, had some bugs, and in the end it was overshadowed by the Intel x86 family.