VAX 8000

The VAX 8000 is a discontinued family of minicomputers developed and manufactured by Digital Equipment Corporation (DEC) using processors implementing the VAX instruction set architecture (ISA).

The VAX 8600, code-named "Venus", introduced in October 1984, is the successor of the VAX-11/785. It was originally to be named "VAX-11/790", but was renamed before launch. The VAX 8600 is a successful model and at the time was the best selling high-end VAX. It was succeeded by the VAX 8800 family in 1987.

The VAX 8600 had a CPU with an 80 ns cycle time (12.5 MHz) implemented with emitter coupled logic (ECL) macrocell arrays (MCAs). The CPU consisted of four major logical sections, the E Box, F Box, I Box and M Box. The E Box executed all instructions, including floating-point instructions through microcode. It had an arithmetic logic unit (ALU) and barrel shifter. The F Box, or floating point accelerator (FPA), is an optional feature that accelerates floating-point instructions as well as integer multiplication and division. It is a two-module set consisting of an adder module and multiplier module. The adder module contains 24 macrocell arrays while the multiplier module contains 21. The I Box fetches and decodes instructions. The M Box controls the memory and I/O, translates virtual addresses to physical addresses and contains a 16 KB data cache.

The CPU used 145 MCAs. These were large scale integration devices fabricated by Motorola in their 3 µm MOSAIC bipolar process. They were packaged in 68-pin leadless chip carriers or pin grid arrays and were mounted onto the printed circuit board in sockets or were soldered in place. An additional 1,100 small scale integration (SSI) and medium scale integration (MSI) ECL logic devices were used. These ICs were spread out over 17 modules plugged into a backplane.

The VAX 8600 supports 4 to 256 MB of ECC memory and has eight slots on the backplane for memory modules. The system originally used 4 MB memory modules populated by 256 KBit metal oxide semiconductor (MOS) RAMs, which limited capacity to 32 MB. Modules with larger capacities were introduced later. The memory is controlled by the M Box, which also provides the memory array bus used to access the memory. This dedicated bus, which has an 80 ns (12.5 MHz) cycle time, contributes to the improved performance the VAX 8600 has over the VAX-11/780, which access memory via the Synchronous Backplane Interconnect (SBI) shared with I/O devices.

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