Unified Display Interface
| Type | Digital video connector | ||
|---|---|---|---|
| Designed | 2006 (Cancelled 2007) | ||
| Produced | None | ||
| Length | 18.8 mm | ||
| Width | 12.5 mm | ||
| Height | 3.7 mm | ||
| Hot pluggable | Yes | ||
| External | Yes | ||
| Audio signal | No | ||
| Video signal | Yes | ||
| Pins | 26 | ||
| Max. voltage | +5V | ||
| Max. current | 0.5 A | ||
| Data signal | R,G,B data + clock and display data channel (TMDS) | ||
| Width | 36 bit (maximum) | ||
| Bitrate | 16 Gbit/s | ||
| Pin 1 | Supply voltage for data link circutry | VDD_UDL | |
| Pin 2 | Supply voltage for data link circutry | VDD_UDL | |
| Pin 3 | Supply voltage for data link circutry | VDD_UDL | |
| Pin 4 | Supply voltage for data link circutry | VDD_UDL | |
| Pin 5 | Supply return for control and data link power | VSS | |
| Pin 6 | Supply return for control and data link power | VSS | |
| Pin 7 | Supply return for control and data link power | VSS | |
| Pin 8 | Supply return for control and data link power | VSS | |
| Pin 9 | Positive side of UDI lane 0 data (userd for x1 and x3 lane widths) | UDI_Data0+ | |
| Pin 10 | Negative side of UDI lane 0 data (userd for x1 and x3 lane widths) | UDI_Data0- | |
| Pin 11 | Shield for UDI_Data0[-/-] | GND | |
| Pin 12 | Positive side of UDI lane 1 data (userd for x1 and x3 lane widths) | UDI_Data1+ | |
| Pin 13 | Negative side of UDI lane 1 data (userd for x1 and x3 lane widths) | UDI_Data1- | |
| Pin 14 | Shield for UDI_Data1[-/-] | Ground | |
| Pin 15 | Positive side of UDI lane 2 data (userd for x1 and x3 lane widths) | UDI_Data2+ | |
| Pin 16 | Negative side of UDI lane 2 data (userd for x1 and x3 lane widths) | UDI_Data2- | |
| Pin 17 | Shield for UDI_Data2[-/-] | GND | |
| Pin 18 | Reserved connector pin. No cable connection | (NC) | |
| Pin 19 | Reserved connector pin. No cable connection | (NC) | |
| Pin 20 | Reserved connector pin. No cable connection | (NC) | |
| Pin 21 | (Test Pin) | ||
| Pin 22 | Ground return | GND | |
| Pin 23 | Supply voltage for control link signals | UDI_EPwr | |
| Pin 24 | UDI control link clock | UDI_CtrlClk | |
| Pin 25 | UDI Control link data | UDI_CtrlData | |
| Pin 26 | UDI link hot-plug detect | UDI_HPD | |
Unified Display Interface (UDI) was a digital video interface specification based on Digital Visual Interface (DVI). It was intended to be a lower cost implementation while providing compatibility with existing High-Definition Multimedia Interface (HDMI) and DVI displays. Unlike HDMI, which is aimed at high-definition multimedia consumer electronics devices such as television monitors and DVD players, UDI was specifically targeted towards computer monitor and video card manufacturers and did not support the transfer of audio data.
UDI was primarily backed by Intel with support from Samsung and other partners. In early 2007 Intel started supporting the similar DisplayPort standard, and both Intel and Samsung withdrew from the UDI SIG. There has been no announcements made about UDI since early 2007 and the UDI website is no longer operational.
UDI provides higher bandwidth than its predecessors (up to 16 Gbit/s in its first version, compared to 4.9 Gbit/s for HDMI 1.0) and incorporates a form of digital rights management known as HDCP. The connector has a single row of 26 contacts pitched 0.6 mm apart from each other, looking very similar to the USB plug which has a single row with only four contacts. Three of the 26 contacts will not be wired but are reserved for undetermined future upgrade possibilities. Transmit and receive plugs are slightly different, and a UDI cable will fit only one way. Bidirectional communication works at a much lower data rate than that available for the single direction video datastream.
On December 20, 2005, the UDI Special Interest Group (UDI SIG) was announced. They worked on determining the refined specifications and promoting the interface. Members included Apple Computer, Intel, LG, NVIDIA, Samsung, and Silicon Image Inc. The UDI specification was finalized in July 2006. The differences between UDI and HDMI was kept to a minimum since both specifications were designed for long-term compatibility.
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