The UNIVAC LARC, short for the Livermore Advanced Research Computer, is a mainframe computer designed to a requirement published by Edward Teller in order to run hydrodynamic simulations for nuclear weapon design. It was one of the earliest supercomputers.
LARC supported multiprocessing with two CPUs (called Computers) and an Input/output (I/O) Processor (called the Processor). Two LARC machines were built, the first delivered to Livermore in June 1960, and the second to the Navy's David Taylor Model Basin. Both examples had only one Computer, so no multiprocessor LARCs were ever built.
The LARC CPUs were able to perform addition in about 4 microseconds, corresponding to about 250 kIPS speed. This made it the fastest computer in the world until 1962 when the IBM 7030 took the title. The 7030 started as IBM's entry to the LARC contest, but Teller chose the simpler Univac over the more risky IBM design.
The LARC was a decimal mainframe computer with 48 bits per word. It used bi-quinary coded decimal arithmetic with four bits per digit, allowing 11-digit signed numbers. Instructions were 48 bits long, one per word. Every digit in the machine had one parity bit for error checking, meaning every word occupied 60 bits (48 bits for data with 12 bits for parity check). The basic configuration had 26 general purpose registers and could be expanded to 99 general purpose registers. The general-purpose registers had an access time of one microsecond.