Time-Slot Interchange

A time-slot interchange (TSI) switch is a network switch that stores data in RAM in one sequence, and reads it out in a different sequence. It uses RAM, a small routing memory and a counter. Like any switch, it has input and output ports. The RAM stores the packets or other data that arrive via its input terminal.

In a pure time-slot interchange switch, there is only one physical input, and one physical output. Each physical connection is an opportunity for a switching fabric to fail. The limited number of connections of this switch is therefore valuable in a large switching fabric, because it makes this type of switching very reliable. The disadvantage of this type of switch is that it introduces delay into the signals.

When a packet (or byte, on telephone switches) comes to the input, the switch stores the data in RAM in one sequence, and reads it out in a different sequence. Switch designs vary, but typically, a repeating counter is incremented with an internal clock. It typically wraps-around to zero. The RAM location chosen for the incoming data is taken from a small memory indexed by the counter. It is usually a location for the desired output time-slot. The current value of the counter also selects the RAM data to forward in the current output time slot. Then the counter is incremented to the next value. The switch repeats the algorithm, eventually sending data from any input time-slot to any output time-slot.

To minimize connections, and therefore improve reliability, the data to reprogram the switch is usually programmed via a single wire that threads through the entire group of integrated circuits in a printed circuit board. The software typically compares the data shifted-in with the data shifted-out, to verify that the ICs remain correctly connected. The switching data entered into the ICs is double-buffered. That is, a new switch set-up is shifted-in, and then a single pulse applies the new configuration instantly to all the connected ICs.

In a time-slot interchange (TSI) switch, two memory accesses are required for each connection (one to read and one to store). Let T be the time to access the memory. Therefore, for a connection, 2T time will be taken to access the memory. If there are n connections and t is the operation time for n lines, then
t=2nT
which gives
n=t/2T

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