TI Advanced Scientific Computer

The Advanced Scientific Computer (ASC) is a supercomputer designed and manufactured by Texas Instruments (TI) between 1966 and 1973. The ASC's central processing unit (CPU) supported vector processing, a performance-enhancing technique which was key to its high-performance. The ASC, along with the Control Data Corporation STAR-100 supercomputer (which was introduced in the same year), were the first computers to feature vector processing. However, this technique's potential was not fully realized by either the ASC or STAR-100 due to an insufficient understanding of the technique; it was the Cray Research Cray-1 supercomputer, announced in 1975 that would fully realize and popularize vector processing. The more successful implementation of vector processing in the Cray-1 would demarcate the ASC (and STAR-100) as first-generation vector processors, with the Cray-1 belonging in the second.

TI had begun as a division of Geophysical Service Incorporated (GSI), a company that performed seismic surveys for oil exploration companies. GSI was now a subsidiary of TI, and TI wanted to apply the latest computer technology to the processing and analysis of seismic datasets. The ASC project started as the Advanced Seismic Computer. As the project developed, TI decided to expand its scope. "Seismic" was replaced by "Scientific" in the name, allowing the project to retain the designation ASC.

Originally the software, including an operating system and a FORTRAN compiler, were done under contract by Computer Usage Company, under direction of George R. Trimble, Jr. but later taken over by TI itself. Southern Methodist University in Dallas developed an ALGOL compiler for the ASC.

The ASC was based around a single high-speed shared memory, which was accessed by the CPU and eight I/O channel controllers, in an organization similar to Seymour Cray's groundbreaking CDC 6600. Memory was accessed solely under the control of the memory control unit (MCU). The MCU was a two-way, 256-bit per channel parallel network that could support up to eight independent processors, with a ninth channel for accessing "main memory" (or "extended memory" as it was referred to as). The MCU also acted as a cache controller, offering high-speed access to a semiconductor-based memory for the eight processor ports, and handling all communications to the 24-bit address space in main memory. The MCU was designed to operate asynchronously, allowing it to work at a variety of speeds and scale across a number of performance points. For instance, main memory could be constructed out of slower but less expensive core memory, although this was not used in practice. At the fastest, it could sustain transfer rates of 80 million 32-bit words per second per port, for a total transfer rate of 640 million words per second. This was well beyond the capabilities of even the fastest memories of the era.

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