Sandy Bridge-E
| Produced | Q4 2011 |
|---|---|
| Designed by | Intel Corporation |
| Max. CPU clock rate | 3.2 GHz to 3.6 GHz |
| Min. feature size | 32 nanometer |
| Instruction set | x86, x86-64, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES-NI, AVX |
| Microarchitecture | Sandy Bridge |
| CPUID code | 0206Dxh |
| Product code | 80619, 80620, 80621, 80622 |
| Cores | 8 (physical), 16 (logical) |
| L2 cache | 8 × 256 kB |
| L3 cache | 20 MB |
| Socket(s) | |
| Application | UP/DP Server, Workstation |
| Brand name(s) |
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Sandy Bridge-E is the codename of an eight-core Intel processor based on the Sandy Bridge microarchitecture. It follows the six-core Gulftown/Westmere-EP processor that used the older LGA 1366 package, which is replaced with LGA 2011 starting with Sandy Bridge-EP. The CPUID extended model number is 45 (2Dh) and four product codes are used, 80619 for the UP Core i7 models and the higher numbers for the various Xeon E5 DP server models. Two versions of the die exist, with four or eight cores, respectively. Out of those, some cores may be disabled, which is used for products that are sold with two or six cores visible to the user.
There are three packages: The original Sandy Bridge-E that allows only a single CPU in the system using an LGA 2011 package for the Core i7-38xx and Xeon E5-16xx models, the Sandy Bridge-EP in the Xeon E5-26xx allowing dual CPUs with the same socket and the Sandy Bridge-EN Xeon E5-24xx that also allows dual CPUs but uses the LGA 1356 package. Later Sandy Bridge-EP will allow up to four CPUs per system.
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