RISC-V
| Designer | University of California, Berkeley |
|---|---|
| Bits | 32, 64, 128 |
| Introduced | 2010 |
| Version | 2.1 |
| Design | RISC |
| Type | Load-store |
| Encoding | Variable |
| Branching | Compare-and-branch |
| Endianness | Little |
| Extensions | M, A, F, D, Q, C, P |
| Open | Yes |
| Registers | |
| General purpose | 16, 32 (x0=0) |
| Floating point | 32 |
RISC-V (pronounced "risk-five") is an open instruction set architecture (ISA) based on established reduced instruction set computing (RISC) principles.
In contrast to most ISAs, the RISC-V ISA can be freely used for all types of use, permitting anyone to design, manufacture and sell RISC-V chips and software. While not the first open ISA, it is significant because it is designed to be useful in modern computerized devices such as warehouse-scale cloud computers, high-end mobile phones and the smallest embedded systems. Such uses demand that the designers consider both performance and power efficiency. The instruction set also has a substantial body of supporting software, which fixes a usual weakness of new instruction sets.
The project was originated in 2010 by researchers in the Computer Science Division at University of California, Berkeley, but many contributors are volunteers and industry workers otherwise unaffiliated with the university.
The RISC-V ISA has been designed with small, fast, and low-power real-world implementations in mind, but without over-architecting for a particular microarchitecture style.
As of January 2017, version 2.1 of the userspace ISA is fixed and the privileged ISA is available as draft version 1.9.1.
The RISC-V authors aim to provide several CPU designs freely available under a BSD license. Such licenses allow derivative works, such as RISC-V chip designs, to be either open and free, like RISC-V itself, or closed and proprietary.
By contrast, commercial chip vendors such as ARM Holdings and MIPS Technologies charge substantial license fees for the use of their patents. They also require non-disclosure agreements before releasing documents that describe their designs' advantages and instruction set. Many design advances are completely proprietary, never described even to customers. The secrecy interferes with legitimate public educational use, security auditing, and the development of public, low–cost free and open-source software compilers, and operating systems.
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