Project Denver
| Designed by | Nvidia |
|---|---|
| Instruction set | ARMv8-A |
| Cores | 2 |
| L1 cache | 192 KiB (128 KiB I-cache with parity, 64 KiB D-cache with ECC) per core |
| L2 cache | 2 MiB |
Project Denver is the codename of a microarchitecture designed by Nvidia that implements the ARMv8-A 64/32-bit instruction sets using a combination of simple hardware decoder and software-based binary translation (dynamic recompilation) where "Denver's binary translation layer runs in software, at a lower level than the operating system, and stores commonly accessed, already optimized code sequences in a 128 MB cache stored in main memory". Denver is a very wide in-order superscalar pipeline. Its design makes it suitable for integration with other SIPs cores (e.g. GPU, display controller, DSP, image processor, etc.) into one die constituting a system on a chip (SoC).
Project Denver is targeted at mobile computers, personal computers, servers, as well as supercomputers.
Dual-core Denver CPU paired with a Kepler-based GPU solution (Tegra K1); the dual-core 2.3 GHz Denver was first used in the HTC Nexus 9 tablet, released November 3, 2014. Note, however that the quad-core Tegra K1, while using the same name isn't based on Denver.
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