Physical Coding Sublayer

The Physical Coding Sublayer (PCS) is a networking protocol sublayer in the Fast Ethernet, Gigabit Ethernet, and 10 Gigabit Ethernet standards. It resides at the top of the physical layer (PHY), and provides an interface between the Physical Medium Attachment (PMA) sublayer and the Media Independent Interface (MII). It is responsible for data encoding/decoding, scrambling/descrambling, alignment marker insertion/removal, block and symbol redistribution, and lane block synchronization and deskew.

The Ethernet PCS sublayer is at the top of the Ethernet physical layer (PHY). The hierarchy is as follows:

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