Nintendo SA-1

The list of Super NES enhancement chips demonstrates the overall design plan for the Super Nintendo Entertainment System, whereby the console's hardware designers had made it easy to interface special coprocessor chips to the console. This standardized selection of chips was available to increase system performance and features for each game cartridge. As increasingly superior chips became available throughout the SNES's vintage market years, this strategy originally provided a cheaper and more versatile way of maintaining the system's market lifespan when compared to Nintendo's option of having included a much more expensive CPU or a more obsolete stock chipset.

As a result, various enhancement chips were integrated into the cartridges of select game titles. The presence of an enhancement chip is most often indicated by 16 additional pins on either side of the original pins, 8 to each side.

The Super FX chip is a 16-bit supplemental RISC CPU developed by Argonaut Games that was included in certain game cartridges to perform functions that the main CPU can not feasibly do. It is typically programmed to act as a graphics accelerator chip that draws polygons to a frame buffer in the RAM sitting adjacent to it.

In addition to rendering polygons, the chip is also used to assist the SNES in rendering advanced 2D effects. Super Mario World 2: Yoshi's Island uses it for advanced graphics effects like sprite scaling and stretching, huge sprites that allow for boss characters to take up the whole screen, and multiple foreground and background parallax layers to give a greater illusion of depth.

This chip went through at least four revisions, first starting out as a surface mounted chip labeled "MARIO CHIP 1" (Mathematical, Argonaut, Rotation & I/O) in the earliest Star Fox cartridges, commonly called the Super FX. The following year, some boards were providing an epoxy version of it, and later a first revision came out under the label "GSU-1". Both versions are clocked with a 21 MHz signal, but an internal clock speed divider halves it to 10.5 MHz on the MARIO CHIP 1. The GSU-1 however runs at the full 21 MHz. Both the MARIO CHIP 1 and the GSU-1 can support a maximum ROM size of 8 Mbits. Later on, the design was revised to become the GSU-2, which is still 16-bit, but unlike the earlier Super FX chips, this version can support a ROM size greater than 8 MBit. The final known revision is the GSU-2-SP1. All versions of the Super FX chip are functionally compatible in terms of their instruction set. The differences arise in how they are packaged, their pinout, their maximum supported ROM size, and their internal clock speed.

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