Negated AND gate

In digital electronics, a NAND gate (negative-AND) is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of the AND gate. A LOW (0) output results only if both the inputs to the gate are HIGH (1); if one or both inputs are LOW (0), a HIGH (1) output results. It is made using transistors and junction diodes. By De Morgan's theorem, AB=A+B, and thus a NAND gate is equivalent to inverters followed by an OR gate.

The NAND gate is significant because any boolean function can be implemented by using a combination of NAND gates. This property is called functional completeness. It shares this property with the NOR gate.

Digital systems employing certain logic circuits take advantage of NAND's functional completeness.

The function NAND(a₁, a₂, ..., a_n) is logically equivalent to NOT(a₁ AND a₂ AND ... AND a_n).

There are three symbols for NAND gates: the MIL/ANSI symbol, the IEC symbol and the deprecated DIN symbol sometimes found on old schematics. For more information see logic gate symbols. The ANSI symbol for the NAND gate is a standard AND gate with an inversion bubble connected.

NAND gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs.

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