Motorola 68000

Motorola 68000 architecture

Designer	Motorola
Bits	16/32-bit
Introduced	1979; 38 years ago (1979)
Design	CISC
Branching	Condition code
Endianness	Big
Registers
General purpose	8 × 32-bit + 7 address registers also usable for most operations + stack pointer

Motorola 68000 CPU

Instructions	56
Data width	16
Address width	24

Motorola 68000 registers

31 ... 23 ... 15 ... 07 ... 00 (bit position) Data registers D0 Data 0 D1 Data 1 D2 Data 2 D3 Data 3 D4 Data 4 D5 Data 5 D6 Data 6 D7 Data 7 Address registers   A0                           Address 0   A1                           Address 1   A2                           Address 2   A3                           Address 3   A4                           Address 4   A5                           Address 5   A6                           Address 6 Stack pointers   A7 / USP                        Stack Pointer (user)   A7' / SSP                        Stack Pointer (supervisor) Program counter   PC                           Program Counter

Condition Code Register   15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 (bit position)   T S M 0 I 0 0 0 X N Z V C CCR

The Motorola 68000 ("'sixty-eight-thousand'"; also called the m68k or Motorola 68k, "sixty-eight-kay") is a 32-bit CISC microprocessor with a 16-bit external data bus, designed and marketed by Motorola Semiconductor Products Sector (later Freescale Semiconductor, now NXP). Introduced in 1979 with HMOS technology as the first member of the successful 32-bit m68k family of microprocessors, it is generally software forward compatible with the rest of the line despite being limited to a 16-bit wide external bus. After 37 years in production, the 68000 architecture is still in use.

The 68000 grew out of the MACSS (Motorola Advanced Computer System on Silicon) project, begun in 1976 to develop an entirely new architecture without backward compatibility. It would be a higher-power sibling complementing the existing 8-bit 6800 line rather than a compatible successor. In the end, the 68000 did retain a compatibility mode for existing 6800 peripheral devices, and a version with an 8-bit data bus was produced. However, the designers mainly focused on the future, or forward compatibility, which gave the 68000 design a head start against later 32-bit instruction set architectures. For instance, the CPU registers are 32 bits wide, though few self-contained structures in the processor itself operate on 32 bits at a time. The MACSS team drew heavily on the influence of minicomputer processor design, such as the PDP-11 and VAX systems, which were similarly microcode based.

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