Logic level

In digital circuits, a logic level is one of a finite number of states that a digital signal can inhabit. Logic levels are usually represented by the voltage difference between the signal and ground, although other standards exist. The range of voltage levels that represents each state depends on the logic family being used.

In binary logic the two levels are logical high and logical low, which generally correspond to a binary 1 and 0 respectively. Signals with one of these two levels can be used in boolean logic for digital circuit design or analysis.

The use of either the higher or the lower voltage level to represent either logic state is arbitrary. The two options are active high and active low. Active-high and active-low states can be mixed at will: for example, a read only memory integrated circuit may have a chip-select signal that is active-low, but the data and address bits are conventionally active-high. Occasionally a logic design is simplified by inverting the choice of active level (see De Morgan's theorem).

The name of an active-low signal is written with a bar above it to distinguish it from an active-high signal. For example, the name Q, read "Q bar" or "Q not", represents an active-low signal. The conventions commonly used are:

The slash convention is also used with signals that have a meaning in both states. For example, it is common to have a read/write line written R/(W), indicating that the signal is high in case of a read and low in case of a write.

Many control signals in electronics are active-low signals (usually reset lines, chip-select lines and so on). Logic families such as TTL can sink more current than they can source, so fanout and noise immunity increase. It also allows for wired-OR logic if the logic gates are open-collector/open-drain with a pull-up resistor. Examples of this are the I²C bus and the Controller Area Network (CAN),and the PCI Local Bus. RS232 signaling, as used on some serial ports, uses active-low signals.

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