ICH10

I/O Controller Hub (ICH) is a family of Intel southbridge microchips used to manage data communications between a CPU and a motherboard, specifically Intel chipsets based on the Intel Hub Architecture. It is designed to be paired with a second support chip known as a northbridge. As with any other southbridge, the ICH is used to connect and control peripheral devices.

As CPU speeds increased data transmission between the CPU and support chipset, the support chipset eventually emerged as a between the processor and the motherboard. Accordingly, starting with the Intel 5 Series, a new architecture was used that incorporated some functions of the traditional north and south bridge chips onto the CPU itself, with the remaining functions being consolidated into a single Platform Controller Hub (PCH). This replaces the traditional two chip setup.

The first version of the ICH was released in June 1999 along with the Intel 810 northbridge. While its predecessor, the PIIX, was connected to the northbridge through an internal PCI bus with a bandwidth of 133 MB/s, the ICH used a proprietary interface (called by Intel Hub Interface) that linked it to the northbridge through an 8-bit wide, 266 MB/s bus.

The Hub Interface was a point-to-point connection between different components on the motherboard. Another design decision was to substitute the rigid North-South axis on the motherboard with a star structure.

Note that, along with the ICH, Intel evolved other uses of the "Hub" terminology. Thus, the northbridge became the Memory Controller Hub (MCH) or if it had integrated graphics (e.g., Intel 810), the Graphics and Memory Controller Hub (GMCH).

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