Hybrid Memory Cube (HMC) is a high-performance RAM interface for through-silicon vias (TSV)-based stacked DRAM memory competing with the incompatible rival interface High Bandwidth Memory (HBM).
Hybrid Memory Cube was announced by Micron Technology in 2011 and promises a 15 times speed improvement over DDR3. The Hybrid Memory Cube Consortium (HMCC) is backed by several major technology companies including Samsung, Micron Technology, Open-Silicon, ARM, HP(since withdrawn), Microsoft(since withdrawn), Altera, and Xilinx.
HMC combines through-silicon vias (TSV) and microbumps to connect multiple (currently 4 to 8) dies of memory cell arrays on top of each other. The memory controller is integrated as a separate die.
HMC uses standard DRAM cells but it has more data banks than classic DRAM memory of the same size. The HMC interface is incompatible with current DDRn (DDR2 or DDR3) and competing High Bandwidth Memory implementations.
HMC technology won the Best New Technology award from The Linley Group (publisher of Microprocessor Report magazine) in 2011.
The first public specification, HMC 1.0, was published in April 2013. According to it, the HMC uses 16-lane or 8-lane (half size) full-duplex differential serial links, with each lane having 10, 12.5 or 15 Gbit/s SerDes. Each HMC package is named a cube, and they can be chained in a network of up to 8 cubes with cube-to-cube links and some cubes using their links as pass-through links. A typical cube package with 4 links has 896 BGA pins and a size of 31x31x3.8 millimeters.