Half subtractor

In electronics, a subtractor can be designed using the same approach as that of an adder. The binary subtraction process is summarized below. As with an adder, in the general case of calculations on multi-bit numbers, three bits are involved in performing the subtraction for each bit of the difference: the minuend (${\displaystyle X_{i}}$), subtrahend (${\displaystyle Y_{i}}$), and a borrow in from the previous (less significant) bit order position (${\displaystyle B_{i}}$). The outputs are the difference bit (${\displaystyle D_{i}}$) and borrow bit ${\displaystyle B_{i+1}}$. The subtractor is best understood by considering that the subtrahend and both borrow bits have negative weights, whereas the X and D bits are positive. The operation performed by the subtractor is to rewrite ${\displaystyle X_{i}-Y_{i}-B_{i}}$ (which can take the values -2, -1, 0, or 1) as the sum ${\displaystyle -2B_{i+1}+D_{i}}$.

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