Release date | April 12, 2010 |
---|---|
Codename | GF10x |
Architecture | Fermi |
Models | GeForce Series
|
Fabrication process and transistors | 260M 40 nm (GT218)
|
Cards | |
Entry-level | GT 420 GT 430 |
Mid-range | GT 440 GTS 450 GTX 460 |
High-end | GTX 465 GTX 470 |
Enthusiast | GTX 480 |
Rendering support | |
Direct3D | Direct3D 11.0 |
OpenCL | OpenCL 1.1 |
OpenGL | OpenGL 4.5 |
History | |
Predecessor | GeForce 200 series |
Successor | GeForce 500 series |
The GeForce 400 Series is the 11th generation of Nvidia's GeForce graphics processing units, which serves as the introduction for the Fermi (microarchitecture) (GF-codenamed chips), named after the Italian physicist Enrico Fermi. The series was originally slated for production in November 2009, but, after a number of delays, launched on March 26, 2010 with availability following in April 2010.
Nvidia described the Fermi (microarchitecture) as the next major step in its line of GPUs following the Tesla (microarchitecture) used since the G80. The GF100, the first Fermi-architecture product, is large: 512 stream processors, in sixteen groups of 32, and 3.0 billion transistors, manufactured by TSMC in a 40 nm process. It is Nvidia's first chip to support OpenGL 4.0 and Direct3D 11. No products with a fully enabled GF100 GPU were ever sold. The GTX 480 had one streaming multiprocessor disabled. The GTX 470 had two streaming multiprocessors and one memory controller disabled. The GTX 465 had five streaming multiprocessors and two memory controllers disabled. Consumer GeForce cards came with 256MB attached to each of the enabled GDDR5 memory controllers, for a total of 1.5, 1.25 or 1.0GB; the Tesla C2050 had 512MB on each of six controllers, and the Tesla C2070 had 1024MB per controller. Both the Tesla cards had fourteen active groups of stream processors.
The chips found in the high performance Tesla branding feature memory with optional ECC and the ability to perform one double-precision floating-point operation per cycle per core; the consumer GeForce cards are artificially driver restricted to one DP operation per four cycles. With these features, combined with support for Visual Studio and C++, Nvidia targeted professional and commercial markets, as well as use in high performance computing.