Floppy controllers

A floppy-disk controller (FDC) is a special-purpose chip and associated disk controller circuitry that directs and controls reading from and writing to a computer's floppy disk drive (FDD). This article contains concepts common to FDCs based on the NEC µPD765 and Intel 8272A or 82072A and their descendants, as used in the IBM PC and compatibles from the 1980s and 1990s. The concepts may or may not be applicable to, or illustrative of, other controllers or architectures.

A single floppy-disk controller (FDC) board can support up to four floppy disk drives. The controller is linked to the system bus of the computer and appears as a set of I/O ports to the CPU. It is often also connected to a channel of the DMA controller. On the x86 PC the floppy controller uses IRQ 6, on other systems other interrupt schemes may be used. The floppy disk controller usually performs data transmission in direct memory access (DMA) mode.

The diagram below shows a floppy disk controller which communicates with the CPU via an Industry Standard Architecture (ISA) bus. An alternative arrangement which is more usual in recent designs has the FDC included in a super I/O chip which communicates via a Low Pin Count (LPC) bus.

Most of the floppy disk controller (FDC) functions are performed by the integrated circuit but some are performed by external hardware circuits. The list of functions performed by each is given below.

The FDC has three I/O ports. These are:

The first two reside inside the FDC IC while the Control port is in the external hardware. The addresses of these three ports are as follows.

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