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English Electric System 4


The English Electric (later ICL) System 4 was a mainframe computer introduced in the mid-1960s. It was derived from the RCA Spectra 70 range, itself a variant of the IBM System 360 architecture.

The models in the range included the System 4-10, 4-30, 4-50 (practically the same as the RCA 70/45), 4-70 (designed in English Electric) and 4-75. ICL documentation also mentions a model 4-40. This was a slugged version of the 4-50, introduced when the 4-30 (intended to be the volume seller) was found to be underpowered and had to be withdrawn. The 4-10 was introduced as a satellite computer, but demand was very low, so it was withdrawn. Only the 4-50 and 4-70, and their successors, the 4-52 and 4-72, sold in any numbers. A slugged 4-72 (the 4-62) was introduced for sale in Eastern Europe.

The System 4-50 and 4-70 were intended for real-time applications, for they had four processor states, each with its own set of general-purpose registers (GPR). Although some states did not have all 16 GPRs, nevertheless, the design avoided having to save registers when switching between processor states. At the lowest level (P1) was the user state. The instructions available in this state were the non-privileged instructions of the IBM System 360. Intermediate levels dealt with various hardware interrupts. State P2 was the Interrupt Response State which performed tasks determined by the Interrupt Control State P3 (the next-highest processor state). The highest state, P4, was the emergency state, initiated in the event of a power failure or a machine check. In the case of power failure, the processor saved the volatile registers before shutting itself down in an orderly fashion. This task was completed within one millisecond from the onset of power failure and removal of power from the machine. For a machine check, an indication of the failure was given to the operator.

In processor states P1 and P2, 16 GPRs were available; in State P3, 6 GPRs were available, while in State P4, 5 GPRs were available. An interrupt status register and interrupt mask register were provided in each of the four processor states. The one set of floating-point registers was available to all processor states.

Instruction times (microseconds) were as follows:

The System 4 could be supplied with medium-speed or high-speed card readers. 80-column cards were read at 800 cards per minute, or at up to 1,435 cards per minute, depending on the model. 51-column cards were read at 1,170 or 1,820 cards per minute, again depending on the model. The high speed reader took the cards end-wise.


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