English Electric KDF9

KDF9 was an early British computer designed and built by English Electric. The first came into service in 1964 and the last of 29 machines was decommissioned in 1980 at the National Physical Laboratory.

The logic circuits of the KDF9 were entirely solid-state. The KDF9 used transformer-coupled diode-transistor logic, built from germanium diodes, about 20,000 transistors, and about 2,000 toroid pulse transformers (magnetic amplifiers). They ran on a 1 MHz clock that delivered two pulses of 250ns separated by 500ns, in each clock cycle. The maximum configuration incorporated 32K words of 48-bit core storage (192K bytes) with a cycle time of 6 microseconds. Each word could hold a 48-bit integer or floating-point number, two 24-bit integer or floating-point numbers, six 8-bit instruction syllables, or eight 6-bit characters. There was also provision for efficient handling of double-word (96-bit) numbers in both integer and floating point formats. However, there was no facility for byte or character addressing, so that non-numerical work suffered by comparison. Moreover, there was no standard character set. Each I/O device type had its own more or less similar character set. Not every character that could be read from paper tape could be successfully printed, for example.

The CPU architecture featured three register sets. The Nest was a 16-deep pushdown stack of arithmetic registers, The SJNS (Subroutine Jump Nesting Store) was a similar stack of return addresses. The Q Store was a set of 16 index registers, each of 48 bits divided into Counter (C), Increment (I) and Modifier (M) parts of 16 bits each. Flags on a memory-reference instruction specified whether the address should be modified by the M part of a Q Store, and, if so, whether the C part should be decremented by 1 and the M part incremented by the contents of the I part. This made the coding of counting loops very efficient. Three additional Nest levels and one additional SJNS level were reserved to Director, the Operating System, allowing short-path interrupts to be handled without explicit register saving and restoring. As a result the interrupt overhead was only 3 clock cycles.

Instructions were of 1, 2 or 3 syllables. Most arithmetic took place at the top of the Nest and used zero-address, 1-syllable instructions, although address arithmetic and index updating were handled separately in the Q store. Q Store handling, and some memory reference instructions, used 2 syllables. Memory reference instructions with a 16-bit address offset, most jump instructions, and 16-bit literal load instructions, all used 3 syllables.

...
Wikipedia