Charge trap flash

Charge Trap Flash (CTF) is a semiconductor memory technology used in creating non-volatile NOR and NAND flash memory. The technology differs from the more conventional floating-gate MOSFET technology in that it uses a silicon nitride film to store electrons rather than the doped polycrystalline silicon typical of a floating gate structure. This approach allows memory manufacturers to reduce manufacturing costs five ways:

AMD and its partner Fujitsu pioneered the production of charge-trapping flash memory in 2002 with the introduction of the GL NOR flash memory family, and the same business, now operating under the Spansion name, has produced charge trapping devices in high volume since that time. Charge trapping flash accounted for 30% of 2008's $2.5 billion NOR flash market. Saifun Semiconductors, who licensed a large charge trapping technology portfolio to several companies, was acquired by Spansion in March 2008.

Although the charge trapping concept has been known since 1967, it wasn't until 2002 that AMD and Fujitsu produced high-volume charge-trapping flash memories.

The charge trapping mechanism, first observed in the 1960s, was used as a storage mechanism in EEPROM before it became popular for use in flash memory.

Charge trapping memory technology was first introduced through the invention of the MNOS transistor by H.A.R. Wegener in 1967. This device could be programmed through the application of a 50-volt forward or reverse bias between the gate and the channel to trap charges that would impact the threshold voltage of the transistor.

In 1977, P.C.Y. Chen, published a paper detailing the invention of SONOS, a technology with far less demanding program and erase conditions and longer charge storage. This improvement led to manufacturable EEPROM devices based on charge-trapping SONOS in the 1980s.

In 1998, Boaz Eitan of Saifun Semiconductor (later acquired by Spansion) patented a flash memory technology named NROM that took advantage of a charge trapping layer to replace the floating gate used in conventional flash memory designs. Two important innovations appear in this patent:

These two new ideas enabled high cycling thus allowing reliable charge trap flash products to be produced for the first time since the charge trapping concept was invented 30 years earlier. Furthermore, using these concepts it is possible to create two separate physical bits per cell, doubling the capacity of stored data per cell.

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