Designed by | ARM Holdings |
---|---|
Max. CPU clock rate | 0.8 GHz to 2 GHz |
Microarchitecture | ARMv7-A |
Cores | 1–4 |
L1 cache | 32 KB I, 32 KB D |
L2 cache | 128 KB–8 MB (configurable with L2 cache controller) |
The ARM Cortex-A9 MPCore is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture. It is a multicore processor providing up to 4 cache-coherent cores.
Key features of the Cortex-A9 core are:
ARM states that the TSMC 40G hard macro implementation typically operating at 2 GHz; a single core (excluding caches) occupies less than 1.5 mm2 when designed in a TSMC 65 nanometer (nm) generic process and can be clocked at speeds over 1 GHz, consuming less than 250 mW per core.
Several system on a chip (SoC) devices implement the Cortex-A9 core, including:
RZ/A1L plus Ethernet AVB support and a JPEG codec unit, 3MByte RAM SoC
NanoPi-2 Fire NanoPi M2 NanoPC-T2